Analog-digital partitioning for low-power UWB impulse radios under CMOS scaling
EURASIP Journal on Wireless Communications and Networking
Progress of quantum electronics and the future of wireless technologies
Microelectronics Journal
A 1-V RF-CMOS LNA design utilizing the technique of capacitive feedback matching network
Integration, the VLSI Journal
Low-power current-reused RF front-end based on optimized transformers topology
Integration, the VLSI Journal
Dual-input pseudo-switch RF low noise amplifier
IEEE Transactions on Circuits and Systems II: Express Briefs
Wafer-level defect screening for "big-D/small-A" mixed-signal SoCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A 0.7 to 3 GHz wireless receiver front end in 65-nm CMOS with an LNA linearized by positive feedback
Analog Integrated Circuits and Signal Processing
Hi-index | 0.00 |
This roadmap for the 2001 International Technology Roadmap for Semiconductors uses performance figures of merit (FoMs) derived from basic circuits critical to mixed-signal design performance. Extrapolations from the FoMs to future performance values establish the device parameters necessary for design progress.