Contentaddressable Memories
Challenges of massive parallelism
IJCAI'93 Proceedings of the 13th international joint conference on Artifical intelligence - Volume 1
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An associative processor architecture that integrates the functionality of content-addressable memory (CAM), functional memory (FM), and associative parallel processors (APPs) in a single-chip architecture is described. The hardware design, environment and applications of the Coherent Processor, a microchannel memory device designed by combining 16 such chips, are discussed. It is shown that the processor's writable control store permits quick execution of application-specific microcoded operations.