Cycle and phase accurate DSP modeling and integration for HW/SW co-verification
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Retargetable compiled simulation of embedded processors using a machine description language
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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When the capabilities or usage of a hardware technology change qualitatively, the focal challenges of developing software for it change too. Such changes are reflected directly in what is required of development tools. We believe the focal challenges of developing software for the emerging generation of single-chip, deeply embedded, multi-processor systems will be debugging and simulation. In this article we discuss how Advanced RISC Machines is responding to the challenge of generating the collateral simulation models needed to turn a large integrated circuit layout component into a component for every stage of the design cycle. We describe our perceptions of how these challenges are being shaped by time-to-market pressure and the emergence of independent intellectual property providers and we hint at further blurring of the historical separation between hardware and software development.