Bounds on Algorithm-Based Fault Tolerance in Multiple Processor Systems
IEEE Transactions on Computers - The MIT Press scientific computation series
An analysis of algorithm-based fault tolerance techniques
Journal of Parallel and Distributed Computing
Design and analysis of fault tolerance schemes for multiprocessor systems
Design and analysis of fault tolerance schemes for multiprocessor systems
Optimal Design of Checks for Error Detection and Location in Fault Tolerant Multiprocessors Systems
Proceedings of the 5th International GI/ITG/GMA Conference on Fault-Tolerant Computing Systems, Tests, Diagnosis, Fault Treatment
Fault-secure algorithms for multiple-processor systems
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
A theory for algorithm-based fault tolerance in array processor systems (checks, bounds, graph-theoretic, errors)
Analysis and design of algorithm-based fault-tolerant systems
Analysis and design of algorithm-based fault-tolerant systems
Combinatorial Analysis of Check Set Construction for Algorithm-Based Fault Tolerance Systems
Journal of Electronic Testing: Theory and Applications
An Efficient Algorithm-Based Fault Tolerance Design Using the Weighted Data-Check Relationship
IEEE Transactions on Computers
Construction of Check Sets for Algorithm-Based Fault Tolerance
IEEE Transactions on Computers
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Lower and upper bounds are established for the combinatorial problem of constructing minimal test sets for error detection in multiprocessor systems. The construction for detecting two errors produces minimal test sets, while that for three errors produces test sets whose size exceeds the lower bound by at most one. Also presented is a divide-and-conquer construction scheme for four or more errors.