Journal of the ACM (JACM) - The MIT Press scientific computation series
Optimal Three-Layer Channel Routing
IEEE Transactions on Computers
Stretching and three-layer wiring planar layouts
Integration, the VLSI Journal
Stretching a Knock-Knee Layout for Multilayer Wiring
IEEE Transactions on Computers
Minimal stretching of a layout to ensure 2-layer wirability
Integration, the VLSI Journal
Routing through a dense channel with minimum total wire length
SODA '91 Proceedings of the second annual ACM-SIAM symposium on Discrete algorithms
A New Approach to Knock-Knee Channel Routing
ISA '91 Proceedings of the 2nd International Symposium on Algorithms
Simple Three-Layer Channel Routing Algorithms
AWOC '88 Proceedings of the 3rd Aegean Workshop on Computing: VLSI Algorithms and Architectures
An animated library of combinatorial VLSI-routing algorithms
Proceedings of the eleventh annual symposium on Computational geometry
Disjoint paths in circular arc graphs
Nordic Journal of Computing
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Presents a global approach to solve the three-layer wirability problem for knock-knee layouts. In general, the problem is NP-complete. Only for very restricted classes of layouts polynomial three-layer wiring algorithms are known up to now. The authors show that for a large class of layouts a three-layer wiring can be constructed by solving a path problem in a special class of graphs or a two-satisfiability problem, and thus may be wired in time linear in the size of the layout area. Moreover, it is shown that a minimum stretching of the layout into a layout belonging to this class can be found by solving a clique cover problem in an interval graph. This problem is solvable in time linear in the size of the layout area as well. Altogether, the method also yields a good heuristic for the three-layer wirability problem for knock-knee layouts.