Parallel Implementation of the Schur Berlekamp-Massey Algorithm on a Linearly Connected Processor Array

Authors:
Christopher J. Zarowski
Affiliations:
-
Venue:
IEEE Transactions on Computers
Year:
1995

Citing 2
Cited 1

On the VLSI Design of a Pipeline Reed-Solomon Decoder Using Systolic Arrays

IEEE Transactions on Computers
Algorithms and architectures for error correcting codes (decoding, reed-solomon)

Algorithms and architectures for error correcting codes (decoding, reed-solomon)

VLSI Algorithms, Architectures, and Implementation of a Versatile GF(2m) Processor

IEEE Transactions on Computers

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Abstract

The Berlekamp-Massey algorithm (BMA) is important in the decoding of Reed-Solomon (RS), and more generally, Bose-Chaudhuri-Hocquenghem (BCH) block error-control codes. For a t-error correcting code the BMA has time complexity O(t2) when implemented on a sequential computer. However, the BMA does not run efficiently on a parallel computer. The BMA can be mapped into the Schur BMA. This paper presents the implementation of the BMA and Schur BMA together on a linearly connected array of 2t processors. The resulting machine computes the error-locator polynomial with a time complexity of O(t).