Communications of the ACM - Special section on computer architecture
Data networks
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
High-performance multi-queue buffers for VLSI communications switches
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
The architecture and programming of the Ametek series 2010 multicomputer
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
iPSC/2 system: a second generation hypercube
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
Computer networks
Warp: an integrated solution of high-speed parallel computing
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
Performance Analysis of k-ary n-cube Interconnection Networks
IEEE Transactions on Computers
Network and processor architecture for message-driven computers
VLSI and parallel computation
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Supporting systolic and memory communication in iWarp
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Theory, Volume 1, Queueing Systems
Theory, Volume 1, Queueing Systems
Methods for message routing in parallel machines
STOC '92 Proceedings of the twenty-fourth annual ACM symposium on Theory of computing
A comparison of adaptive wormhole routing algorithms
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Optimal fully adaptive wormhole routing for meshes
Proceedings of the 1993 ACM/IEEE conference on Supercomputing
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
The interaction between virtual channel flow control and adaptive routing in wormhole networks
ICS '94 Proceedings of the 8th international conference on Supercomputing
Fault-tolerant wormhole routing in tori
ICS '94 Proceedings of the 8th international conference on Supercomputing
Unicast-Based Multicast Communication in Wormhole-Routed Networks
IEEE Transactions on Parallel and Distributed Systems
Ariadne—an adaptive router for fault-tolerant multicomputers
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
Compressionless routing: a framework for adaptive and fault-tolerant routing
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
Software overhead in messaging layers: where does the time go?
ASPLOS VI Proceedings of the sixth international conference on Architectural support for programming languages and operating systems
Planar-adaptive routing: low-cost adaptive networks for multiprocessors
Journal of the ACM (JACM)
A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks
IEEE Transactions on Parallel and Distributed Systems
The SP2 high-performance switch
IBM Systems Journal
A universal proof technique for deadlock-free routing in interconnection networks
Proceedings of the seventh annual ACM symposium on Parallel algorithms and architectures
ROMM routing on mesh and torus networks
Proceedings of the seventh annual ACM symposium on Parallel algorithms and architectures
Flexible oblivious router architecture
IBM Journal of Research and Development
An efficient, fully adaptive deadlock recovery scheme: DISHA
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Analysis and implementation of hybrid switching
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Configurable flow control mechanisms for fault-tolerant routing
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Petri net modeling of interconnection networks for massively parallel architectures
ICS '95 Proceedings of the 9th international conference on Supercomputing
A Trip-Based Multicasting Model in Wormhole-Routed Networks with Virtual Channels
IEEE Transactions on Parallel and Distributed Systems
A Framework for Designing Deadlock-Free Wormhole Routing Algorithms
IEEE Transactions on Parallel and Distributed Systems
A Family of Interconnection Networks for Nonuniform Traffic
IEEE Transactions on Parallel and Distributed Systems
Distributed, Deadlock-Free Routing in Faulty, Pipelined, Direct Interconnection Networks
IEEE Transactions on Computers
Adaptive Fault-Tolerant Deadlock-Free Routing in Meshes and Hypercubes
IEEE Transactions on Computers
Analysis and Implementation of Hybrid Switching
IEEE Transactions on Computers
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
A router architecture for real-time point-to-point networks
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
Augmented Binary Hypercube: A New Architecture for Processor Management
IEEE Transactions on Computers
On the benefit of supporting virtual channels in wormhole routers
Proceedings of the eighth annual ACM symposium on Parallel algorithms and architectures
Evaluating virtual channels for cache-coherent shared-memory multiprocessors
ICS '96 Proceedings of the 10th international conference on Supercomputing
A Broadcast Algorithm for All-Port Wormhole-Routed Torus Networks
IEEE Transactions on Parallel and Distributed Systems
Compressionless Routing: A Framework for Adaptive and Fault-Tolerant Routing
IEEE Transactions on Parallel and Distributed Systems
A Traffic-Balanced Adaptive Wormhole Routing Scheme for Two-Dimensional Meshes
IEEE Transactions on Computers
Performance Analysis of Buffering Schemes in Wormhole Routers
IEEE Transactions on Computers
PP-MESS-SIM: A Flexible and Extensible Simulator for Evaluating Multicomputer Networks
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Deadlock-free oblivious wormhole routing with cyclic dependencies
Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures
A Theory of Fault-Tolerant Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Impact of selection functions on routing algorithm performance in multicomputer networks
ICS '97 Proceedings of the 11th international conference on Supercomputing
Performance benefits of virtual channels and adaptive routing: an application-driven study
ICS '97 Proceedings of the 11th international conference on Supercomputing
The Case for Chaotic Adaptive Routing
IEEE Transactions on Computers
A Cost and Speed Model for k-ary n-Cube Wormhole Routers
IEEE Transactions on Parallel and Distributed Systems
Resource Deadlocks and Performance of Wormhole Multicast Routing Algorithms
IEEE Transactions on Parallel and Distributed Systems
A General Theory for Deadlock Avoidance in Wormhole-Routed Networks
IEEE Transactions on Parallel and Distributed Systems
A Priority-Driven Flow Control Mechanism for Real-Time Traffic in Multiprocessor Networks
IEEE Transactions on Parallel and Distributed Systems
A Router Architecture for Real-Time Communication in Multicomputer Networks
IEEE Transactions on Computers
Wormhole routing techniques for directly connected multicomputer systems
ACM Computing Surveys (CSUR)
Dynamically Configurable Message Flow Control for Fault-Tolerant Routing
IEEE Transactions on Parallel and Distributed Systems
The Offset Cube: A Three-Dimensional Multicomputer Network Topology Using Through-Wafer Optics
IEEE Transactions on Parallel and Distributed Systems
Low-level router design and its impact on supercomputer system performance
ICS '99 Proceedings of the 13th international conference on Supercomputing
Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity
ICS '99 Proceedings of the 13th international conference on Supercomputing
A new method to make communication latency uniform: distributed routing balancing
ICS '99 Proceedings of the 13th international conference on Supercomputing
ICS '99 Proceedings of the 13th international conference on Supercomputing
Periodically Regular Chordal Rings
IEEE Transactions on Parallel and Distributed Systems
Fault-Tolerant Communication with Partitioned Dimension-Order Routers
IEEE Transactions on Parallel and Distributed Systems
A Testbed for Evaluation of Fault-Tolerant Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Parallel and Distributed Systems
Flexible and Efficient Routing Based on Progressive Deadlock Recovery
IEEE Transactions on Computers
Asynchronous Tree-Based Multicasting in Wormhole-Switched MINs
IEEE Transactions on Parallel and Distributed Systems
A Performance Model for Duato's Fully Adaptive Routing Algorithm in k$k$-Ary n$n$-Cubes
IEEE Transactions on Computers
Software-Based Rerouting for Fault-Tolerant Pipelined Communication
IEEE Transactions on Parallel and Distributed Systems
Recursive Cube of Rings: A New Topology for Interconnection Networks
IEEE Transactions on Parallel and Distributed Systems
Performance evaluation of a new routing strategy for irregular networks with source routing
Proceedings of the 14th international conference on Supercomputing
Static scheduling algorithms for allocating directed task graphs to multiprocessors
ACM Computing Surveys (CSUR)
Pomegranate: a fully scalable graphics architecture
Proceedings of the 27th annual conference on Computer graphics and interactive techniques
High-Performance Routing in Networks of Workstations with Irregular Topology
IEEE Transactions on Parallel and Distributed Systems
The Odd-Even Turn Model for Adaptive Routing
IEEE Transactions on Parallel and Distributed Systems
Communication Reduction in Multiple Multicasts Based on Hybrid Static-Dynamic Scheduling
IEEE Transactions on Parallel and Distributed Systems
On the Use of Virtual Channels in Networks of Workstations with Irregular Topology
IEEE Transactions on Parallel and Distributed Systems
Minimal adaptive routing with limited injection on Toroidal k-ary n-cubes
Supercomputing '96 Proceedings of the 1996 ACM/IEEE conference on Supercomputing
An Analytical Model of Adaptive Wormhole Routing in Hypercubes in the Presence of Hot Spot Traffic
IEEE Transactions on Parallel and Distributed Systems
Unicast-based broadcast: an analysis for the hypercube with adaptive routing
Proceedings of the 2001 ACM symposium on Applied computing
Analysis of adaptive wormhole-routed torus networks with IPP input traffic
Proceedings of the 2001 ACM symposium on Applied computing
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
QoS provisioning in clusters: an investigation of Router and NIC design
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Barrier Synchronization on Wormhole-Routed Networks
IEEE Transactions on Parallel and Distributed Systems
Analytical Modeling of Wormhole-Routed k-Ary n-Cubes in the Presence of Hot-Spot Traffic
IEEE Transactions on Computers
Wormhole IP over (connectionless) ATM
IEEE/ACM Transactions on Networking (TON)
A General Theory for Deadlock-Free Adaptive Routing Using a Mixed Set of Resources
IEEE Transactions on Parallel and Distributed Systems
Deadlock-Free Oblivious Wormhole Routing with Cyclic Dependencies
IEEE Transactions on Computers
A Cost-Effective Approach to Deadlock Handling in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Communication delay in wormhole-routed torus networks
Proceedings of the 2002 ACM symposium on Applied computing
A simple mathematical model of adaptive routing in wormhole k-ary n-cubes
Proceedings of the 2002 ACM symposium on Applied computing
Fair and Efficient Packet Scheduling Using Elastic Round Robin
IEEE Transactions on Parallel and Distributed Systems
Logic emulation with virtual wires
Readings in hardware/software co-design
Boosting the Performance of Myrinet Networks
IEEE Transactions on Parallel and Distributed Systems
Modeling of interconnection subsystems for massively parallel computers
Performance Evaluation
The Journal of Supercomputing
A Comparative Study of Switching Methods in Multicomputer Networks
The Journal of Supercomputing
Performance tuning of adaptive wormhole routing through selection function choice
Journal of Parallel and Distributed Computing
Fault-tolerant routing with non-adaptive wormhole algorithms in mesh networks
Proceedings of the 1994 ACM/IEEE conference on Supercomputing
Design and analysis of static memory management policies for CC-NUMA Multiprocessors
Journal of Systems Architecture: the EUROMICRO Journal
On the merits of hypermeshes and tori with adaptive routing
Journal of Systems Architecture: the EUROMICRO Journal
A Delay Model for Router Microarchitectures
IEEE Micro
Fault-Tolerant Wormhole Routing Algorithms for Mesh Networks
IEEE Transactions on Computers
A Performance Model of Pipelined k-ary n-cubes
IEEE Transactions on Computers
Valved Routing: Efficient Flow Control for Adaptive Nonminimal Routing in Interconnection Networks
IEEE Transactions on Computers
Impact of Virtual Channels and Adaptive Routing on Application Performance
IEEE Transactions on Parallel and Distributed Systems
The Impact of Pipelined Channels on k-ary n-Cube Networks
IEEE Transactions on Parallel and Distributed Systems
Deadlock-Free Multicast Wormhole Routing in 2-D Mesh Multicomputers
IEEE Transactions on Parallel and Distributed Systems
The Message Flow Model for Routing in Wormhole-Routed Networks
IEEE Transactions on Parallel and Distributed Systems
A Theory of Deadlock-Free Adaptive Multicast Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Optimal Multicast Communication in Wormhole-Routed Torus Networks
IEEE Transactions on Parallel and Distributed Systems
A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Alleviating Consumption Channel Bottleneck in Wormhole-Routed k-ary n-Cube Systems
IEEE Transactions on Parallel and Distributed Systems
Balancing Buffer Utilization in Meshes Using a 'Restricted Area' Concept
IEEE Transactions on Parallel and Distributed Systems
Boosting the Performance of Myrinet Networks
IEEE Transactions on Parallel and Distributed Systems
MediaWorm: A QoS Capable Router Architecture for Clusters
IEEE Transactions on Parallel and Distributed Systems
A foundation for designing deadlock-free routing algorithms in wormhole networks
Journal of the ACM (JACM)
An Euler Path Based Technique for Deadlock-free Multicasting
ICPP '97 Proceedings of the international Conference on Parallel Processing
Network Performance under Physical Constraints
ICPP '97 Proceedings of the international Conference on Parallel Processing
Throttle and Preempt: A New Flow Control for Real-Time Communications in Wormhole Networks
ICPP '97 Proceedings of the international Conference on Parallel Processing
Software-Based Deadlock Recovery Technique for True Fully Adaptive Routing in Wormhole Networks
ICPP '97 Proceedings of the international Conference on Parallel Processing
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Analyzing the Influence of Virtual Lanes on the Performance of InfiniBand Networks
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
A Performance Model for k-Ary n-Cube Networks with Self-Similar Traffic
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Deadlock- and Livelock-Free Routing Protocols for Wave Switching
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
On the Performance of Cubic Networks under Correlated Traffic Pattern
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Performance Analysis of Wormhole-Switched k-Ary n-Cubes with Bursty Traffic
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
ISHPC '00 Proceedings of the Third International Symposium on High Performance Computing
On the Influence of the Selection Function on the Performance of Networks of Workstations
ISHPC '00 Proceedings of the Third International Symposium on High Performance Computing
Avoiding Network Congestion with Local Information
ISHPC '02 Proceedings of the 4th International Symposium on High Performance Computing
Improving InfiniBand Routing through Multiple Virtual Networks
ISHPC '02 Proceedings of the 4th International Symposium on High Performance Computing
Analysis of Broadcast Communication in 2D Tori
Euro-Par '01 Proceedings of the 7th International Euro-Par Conference Manchester on Parallel Processing
Analysis of Pipelined Circuit Switching in Cube Networks (Research Note)
Euro-Par '00 Proceedings from the 6th International Euro-Par Conference on Parallel Processing
An Active Network for Improving Performance of Traffic Flow over Conventional ATM Service
ICN '01 Proceedings of the First International Conference on Networking-Part 2
A Genetic Routing Algorithm for a 2D-Meshed Fault-Tolerant Network System
AISA '02 Proceedings of the First International Workshop on Advanced Internet Services and Applications
An overview of the BlueGene/L Supercomputer
Proceedings of the 2002 ACM/IEEE conference on Supercomputing
Orion: a power-performance simulator for interconnection networks
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
On the Design of a High-Performance Adaptive Router for CC-NUMA Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Analysis of k-ary n-cubes with dimension-ordered routing
Future Generation Computer Systems - Selected papers from CCGRID 2002
VLSI Architecture: Past, Present, and Future
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Analysis of deadlock-free path-based wormhole multicasting in meshes in case of contentions
FRONTIERS '96 Proceedings of the 6th Symposium on the Frontiers of Massively Parallel Computation
Communication Delay in Wormhole-Switched Tori Networks under Bursty Workloads
The Journal of Supercomputing
Efficient and balanced adaptive routing in two-dimensional meshes
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
Modeling virtual channel flow control in hypercubes
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
RMB -- A Reconfigurable Multiple Bus Network
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Fault-Tolerance with Multimodule Routers
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Performance Enhancement Techniques for InfiniBand" Architecture
HPCA '03 Proceedings of the 9th International Symposium on High-Performance Computer Architecture
Analysis of Buffer Design for Adaptive Routing in Direct Networks
MASCOTS '96 Proceedings of the 4th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems
Journal of Parallel and Distributed Computing
A Performance Model of Adaptive Routing in k-Ary n-Cubes with Matrix-Transpose Traffic
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
Verilog modeling and simulation of a communication coprocessor for multicomputers
IVC '95 Proceedings of the 4th IEEE International Verilog HDL Conference
GOAL: a load-balanced adaptive routing algorithm for torus networks
Proceedings of the 30th annual international symposium on Computer architecture
Analytical modelling of wormhole-routed k-ary n-cubes in the presence of matrix-transpose traffic
Journal of Parallel and Distributed Computing
ICCCN '95 Proceedings of the 4th International Conference on Computer Communications and Networks
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
An analytical model of wormhole-routed hypercubes under broadcast traffic
Performance Evaluation
Applying In-Transit Buffers to Boost the Performance of Networks with Source Routing
IEEE Transactions on Computers
Performance prediction of wormhole switching in hypercubes with bursty traffic pattern
Proceedings of the 2003 ACM symposium on Applied computing
Anchored opportunity queueing: a low-latency scheduler for fair arbitration among virtual channels
Journal of Parallel and Distributed Computing
Hardware for multiconnected networks: the design flow
Information Sciences—Informatics and Computer Science: An International Journal - Special issue: Informatics and computer science intelligent systems applications
Communication delay in hypercubic networks with LRD traffic
Proceedings of the 2004 ACM symposium on Applied computing
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Pseudo-cycle-based multicast routing in wormhole-routed networks
Journal of Computer Science and Technology
A Performance Model for Wormhole-Switched Interconnection Networks under Self-Similar Traffic
IEEE Transactions on Computers
Analysis of true fully adaptive routing with software-based deadlock recovery
Journal of Systems and Software - Special issue: Computer systems
Exploring Virtual Network Selection Algorithms in DSM Cache Coherence Protocols
IEEE Transactions on Parallel and Distributed Systems
An Effective Methodology to Improve the Performance of the Up*/Down* Routing Algorithm
IEEE Transactions on Parallel and Distributed Systems
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Evaluation of queue designs for true fully adaptive routers
Journal of Parallel and Distributed Computing
High-level power analysis for on-chip networks
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
On the performance of multicomputer interconnection networks
Journal of Systems Architecture: the EUROMICRO Journal
Performance Evaluation - Special issue: Distributed systems performance
Part II: A Methodology for Developing Deadlock-Free Dynamic Network Reconfiguration Processes
IEEE Transactions on Parallel and Distributed Systems
A Memory-Effective Routing Strategy for Regular Interconnection Networks
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 14 - Volume 15
The Effect of Virtual Channel Organization on the Performance of Interconnection Networks
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 14 - Volume 15
Analytical Modelling of Hot-Spot Traffic in Deterministically-Routed K-Ary N-Cubes
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 15 - Volume 16
Micro-architecture techniques in the intel® E8870 scalable memory controller
WMPI '04 Proceedings of the 3rd workshop on Memory performance issues: in conjunction with the 31st international symposium on computer architecture
Cost considerations in network on chip
Integration, the VLSI Journal - Special issue: Networks on chip and reconfigurable fabrics
Comparative Modeling of Network Topologies and Routing Strategies in Multicomputers
International Journal of High Performance Computing Applications
A Holistic Approach to Designing Energy-Efficient Cluster Interconnects
IEEE Transactions on Computers
Near-Optimal Worst-Case Throughput Routing for Two-Dimensional Mesh Networks
Proceedings of the 32nd annual international symposium on Computer Architecture
Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
IEEE Transactions on Computers
Hardware-modulated parallelism in chip multiprocessors
ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05
Performance Modelling and Analysis of Pipelined Circuit Switching in Hypercubes with Faults
HPCASIA '05 Proceedings of the Eighth International Conference on High-Performance Computing in Asia-Pacific Region
SCMP: a single-chip message-passing parallel computer
The Journal of Supercomputing - Special issue: Parallel and distributed processing and applications
Stochastic Analysis of Deterministic Routing Algorithms in the Presence of Self-Similar Traffic
The Journal of Supercomputing
NANA: A nano-scale active network architecture
ACM Journal on Emerging Technologies in Computing Systems (JETC)
A flit level simulator for wormhole routing
ACM-SE 38 Proceedings of the 38th annual on Southeast regional conference
Implementation analysis of NoC: a MPSoC trace-driven approach
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
A survey of research and practices of Network-on-chip
ACM Computing Surveys (CSUR)
The BlackWidow High-Radix Clos Network
Proceedings of the 33rd annual international symposium on Computer Architecture
Switch fabric design for high performance IP routers: a survey
Journal of Systems Architecture: the EUROMICRO Journal
A performance model of compressionless routing in k-ary n-cube networks
Performance Evaluation
DyXY: a proximity congestion-aware deadlock-free dynamic routing method for network on chip
Proceedings of the 43rd annual Design Automation Conference
An analytical model for hypercubes in the presence of multiple time-scale bursty traffic
Journal of Systems Architecture: the EUROMICRO Journal
FIR: an efficient routing strategy for tori and meshes
Journal of Parallel and Distributed Computing - 19th International parallel and distributed processing symposium
Explanation of Performance Degradation in Turn Model
The Journal of Supercomputing
A hierarchical modeling framework for on-chip communication architectures of multiprocessing SoCs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Adaptive routing in high-radix clos network
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
A deadlock detection mechanism for true fully adaptive routing in regular wormhole networks
Computer Communications
Flattened butterfly: a cost-efficient topology for high-radix networks
Proceedings of the 34th annual international symposium on Computer architecture
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Proceedings of the 34th annual international symposium on Computer architecture
Interconnect design considerations for large NUCA caches
Proceedings of the 34th annual international symposium on Computer architecture
Sequencing of Concurrent Communication Traffic in a Mesh Multicomputer with Virtual Channels
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Optimal Multicast Communication in Wormhole-Routed Torus Networks
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Fast, Accurate and Detailed NoC Simulations
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Exploring IBA Design Space for Improved Performance
IEEE Transactions on Parallel and Distributed Systems
Layered switching for networks on chip
Proceedings of the 44th annual Design Automation Conference
Mathematical performance modelling of adaptive wormhole routing in optoelectronic hypercubes
Journal of Parallel and Distributed Computing
Microprocessors & Microsystems
Performance analysis of fault-tolerant routing algorithm in wormhole-switched interconnections
The Journal of Supercomputing
NoC design flow for TDMA and QoS management in a GALS context
EURASIP Journal on Embedded Systems
A new approach to model virtual channels in interconnection networks
Journal of Computer and System Sciences
Communication delay analysis of fault-tolerant pipelined circuit switching in torus
Journal of Computer and System Sciences
Analysis and optimization of prediction-based flow control in networks-on-chip
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Dynamic channel selection: an efficient strategy for balancing traffic in meshes
International Journal of Computational Science and Engineering
International Journal of High Performance Computing and Networking
An accurate mathematical performance model of adaptive routing in the star graph
Future Generation Computer Systems
Pipelined circuit switching: Analysis for the torus with non-uniform traffic
Journal of Systems Architecture: the EUROMICRO Journal
Combinatorial performance modelling of toroidal cubes
Journal of Systems Architecture: the EUROMICRO Journal
Performance modelling of pipelined circuit switching in hypercubes with hot spot traffic
Microprocessors & Microsystems
Technology-Driven, Highly-Scalable Dragonfly Topology
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing
Proceedings of the 45th annual Design Automation Conference
A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
Proceedings of the 45th annual Design Automation Conference
Real-Time Communication Analysis for On-Chip Networks with Wormhole Switching
NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip
A new general method to compute virtual channels occupancy probabilities in wormhole networks
Journal of Computer and System Sciences
An open-loop flow control scheme based on the accurate global information of on-chip communication
Proceedings of the conference on Design, automation and test in Europe
BARP-a dynamic routing protocol for balanced distribution of traffic in NoCs
Proceedings of the conference on Design, automation and test in Europe
Performance Evaluation of Fully Adaptive Routing for the Torus Interconnect Networks
ICCS '07 Proceedings of the 7th international conference on Computational Science, Part IV: ICCS 2007
Integration, the VLSI Journal
Future Generation Computer Systems
Diastolic arrays: throughput-driven reconfigurable computing
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Off-chip communication architectures for high throughput network processors
Computer Communications
Application-aware deadlock-free oblivious routing
Proceedings of the 36th annual international symposium on Computer architecture
Achieving predictable performance through better memory controller placement in many-core CMPs
Proceedings of the 36th annual international symposium on Computer architecture
REDEFINE: Runtime reconfigurable polymorphic ASIC
ACM Transactions on Embedded Computing Systems (TECS)
Static virtual channel allocation in oblivious routing
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
Exploring concentration and channel slicing in on-chip network router
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
A scalable micro wireless interconnect structure for CMPs
Proceedings of the 15th annual international conference on Mobile computing and networking
Streaming FFT on REDEFINE-v2: an application-architecture design space exploration
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Router microarchitecture and scalability of ring topology in on-chip networks
Proceedings of the 2nd International Workshop on Network on Chip Architectures
Router designs for elastic buffer on-chip networks
Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis
Allocator implementations for network-on-chip routers
Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis
Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A DAMQ shared buffer scheme for network-on-chip
CSS '07 Proceedings of the Fifth IASTED International Conference on Circuits, Signals and Systems
Blue Gene/L torus interconnection network
IBM Journal of Research and Development
Mesh-of-trees and alternative interconnection networks for single-chip parallelism
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Analytical modelling of networks in multicomputer systems under bursty and batch arrival traffic
The Journal of Supercomputing
An network reconfiguration strategy for customer requirements optimization
WiCOM'09 Proceedings of the 5th International Conference on Wireless communications, networking and mobile computing
Balancing traffic in meshes by dynamic channel selection
ISPA'03 Proceedings of the 2003 international conference on Parallel and distributed processing and applications
Performance analysis of interconnection networks under bursty and batch arrival traffic
ICA3PP'07 Proceedings of the 7th international conference on Algorithms and architectures for parallel processing
Mathematical performance modelling of stretched hypercubes
ICDCN'08 Proceedings of the 9th international conference on Distributed computing and networking
Communication-prediction of scouting switching in adaptively-routed torus networks
NPC'07 Proceedings of the 2007 IFIP international conference on Network and parallel computing
Network-on-chip architecture design based on mesh-of-tree deterministic routing topology
International Journal of High Performance Systems Architecture
Evaluating Bufferless Flow Control for On-chip Networks
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
Hierarchical Network-on-Chip for Embedded Many-Core Architectures
NOCS '10 Proceedings of the 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip
Performance modeling of n-dimensional mesh networks
Performance Evaluation
Proceedings of the Conference on Design, Automation and Test in Europe
Power-performance analysis of networks-on-chip with arbitrary buffer allocation schemes
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special section on the ACM IEEE international conference on formal methods and models for codesign (MEMOCODE) 2009
Exploring programming model-driven QoS support for NoC-based platforms
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A low-area multi-link interconnect architecture for GALS chip multiprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Performance modeling of Cartesian product networks
Journal of Parallel and Distributed Computing
Increasing the adaptivity of routing algorithms for k-ary n-cubes
EUROMICRO-PDP'02 Proceedings of the 10th Euromicro conference on Parallel, distributed and network-based processing
Reliable network-on-chip design for multi-core system-on-chip
The Journal of Supercomputing
On the probability distribution of busy virtual channels
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Software-based fault-tolerant routing algorithm in multi- dimensional networks
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Analytical performance modelling of partially adaptive routing in wormhole hypercubes
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Analytical performance modelling of adaptive wormhole routing in the star interconnection network
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Modeling and evaluation of ring-based interconnects for Network-on-Chip
Journal of Systems Architecture: the EUROMICRO Journal
Pseudo-Circuit: Accelerating Communication for On-Chip Interconnection Networks
MICRO '43 Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Modeling the effects of hot-spot traffic load on the performance of wormhole-switched hypermeshes
Computers and Electrical Engineering
Asynchronous spatial division multiplexing router
Microprocessors & Microsystems
Design of a performance enhanced and power reduced dual-crossbar Network-on-Chip (NoC) architecture
Microprocessors & Microsystems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Static timing analysis for modeling QoS in networks-on-chip
Journal of Parallel and Distributed Computing
A new adaptive fault-tolerant protocol for direct multiprocessors networks
ICCOM'06 Proceedings of the 10th WSEAS international conference on Communications
VLSI micro-architectures for high-radix crossbar schedulers
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
An abacus turn model for time/space-efficient reconfigurable routing
Proceedings of the 38th annual international symposium on Computer architecture
Worst-case end-to-end delays evaluation for SpaceWire networks
Discrete Event Dynamic Systems
Performance evaluation of a wormhole-routed algorithm for irregular mesh NoC interconnect
ICDCN'10 Proceedings of the 11th international conference on Distributed computing and networking
Journal of Systems and Software
A latency simulator for many-core systems
Proceedings of the 44th Annual Simulation Symposium
Energy characteristic of a processor allocator and a network-on-chip
International Journal of Applied Mathematics and Computer Science - SPECIAL SECTION: Efficient Resource Management for Grid-Enabled Applications
On the use of multiplanes on a 2D mesh network-on-chip
ICA3PP'11 Proceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part II
BOFAR: buffer occupancy factor based adaptive router for mesh NoCs
Proceedings of the 4th International Workshop on Network on Chip Architectures
sFtree: A fully connected and deadlock-free switch-to-switch routing algorithm for fat-trees
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
The Journal of Supercomputing
Tree-turn routing: an efficient deadlock-free routing algorithm for irregular networks
The Journal of Supercomputing
Modeling real-time wormhole networks by queuing theory
ISPA'05 Proceedings of the Third international conference on Parallel and Distributed Processing and Applications
A performance model of fault-tolerant routing algorithm in interconnect networks
ICCS'06 Proceedings of the 6th international conference on Computational Science - Volume Part I
Dynamic evolution of congestion trees: analysis and impact on switch architecture
HiPEAC'05 Proceedings of the First international conference on High Performance Embedded Architectures and Compilers
Performance modeling of a fully adaptive and fault-tolerant wormhole switching strategy in 2-d mesh
ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part V
Cost-Effective buffered wormhole routing
ISPA'04 Proceedings of the Second international conference on Parallel and Distributed Processing and Applications
InfiniBand congestion control: modelling and validation
Proceedings of the 4th International ICST Conference on Simulation Tools and Techniques
Making-a-stop: A new bufferless routing algorithm for on-chip network
Journal of Parallel and Distributed Computing
Packet chaining: efficient single-cycle allocation for on-chip networks
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
A simple and efficient input selection function for networks-on-chip
ICDCN'12 Proceedings of the 13th international conference on Distributed Computing and Networking
Networks on chips: structure and design methodologies
Journal of Electrical and Computer Engineering - Special issue on Networks-on-Chip: Architectures, Design Methodologies, and Case Studies
Mathematical and Computer Modelling: An International Journal
Performance evaluation and design trade-offs for wireless network-on-chip architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
An accurate performance model for network-on-chip and multicomputer interconnection networks
Journal of Parallel and Distributed Computing
Globally Synchronized Frames for guaranteed quality-of-service in on-chip networks
Journal of Parallel and Distributed Computing
Performance modeling of wormhole hypermeshes under hotspot traffic
CSR'07 Proceedings of the Second international conference on Computer Science: theory and applications
Optimal placement of frequently accessed IPs in mesh NoCs
ACSAC'07 Proceedings of the 12th Asia-Pacific conference on Advances in Computer Systems Architecture
ACSAC'07 Proceedings of the 12th Asia-Pacific conference on Advances in Computer Systems Architecture
Stochastic communication delay analysis of adaptive wormhole-switched routings in tori with faults
ISPA'07 Proceedings of the 5th international conference on Parallel and Distributed Processing and Applications
Response time analysis for static priority based SpaceWire networks
Proceeings of the 2nd International Workshop on Worst-Case Traversal Time
TRACKER: a low overhead adaptive NoC router with load balancing selection strategy
Proceedings of the International Conference on Computer-Aided Design
Addressing End-to-End Memory Access Latency in NoC-Based Multicores
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
NoC simulation in heterogeneous architectures for PGAS programming model
Proceedings of the 16th International Workshop on Software and Compilers for Embedded Systems
Proceedings of the 27th international ACM conference on International conference on supercomputing
DeBAR: deflection based adaptive router with minimal buffering
Proceedings of the Conference on Design, Automation and Test in Europe
21st century digital design tools
Proceedings of the 50th Annual Design Automation Conference
Virtual networks -- distributed communication resource management
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special Section on 19th Reconfigurable Architectures Workshop (RAW 2012)
Area efficient asynchronous SDM routers using 2-stage clos switches
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
High and stable performance under adverse traffic patterns of tori-connected torus network
Computers and Electrical Engineering
Channel reservation protocol for over-subscribed channels and destinations
SC '13 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
Obtaining the optimal configuration of high-radix Combined switches
Journal of Parallel and Distributed Computing
Are virtual channels the bottleneck of priority-aware wormhole-switched NoC-based many-cores?
Proceedings of the 21st International conference on Real-Time Networks and Systems
BBQ: a straightforward queuing scheme to reduce hol-blocking in high-performance hybrid networks
Euro-Par'13 Proceedings of the 19th international conference on Parallel Processing
LEF: long edge first routing for two-dimensional mesh network on chip
Proceedings of the Sixth International Workshop on Network on Chip Architectures
Towards optimal adaptive routing in 3D NoC with limited vertical bandwidth
Proceedings of the Sixth International Workshop on Network on Chip Architectures
Power and Latency Optimized Deadlock-Free Routing Algorithm on Irregular 2D Mesh NoC using LBDRe
International Journal of Embedded and Real-Time Communication Systems
A new proposal to deal with congestion in InfiniBand-based fat-trees
Journal of Parallel and Distributed Computing
Dual partitioning multicasting for high-performance on-chip networks
Journal of Parallel and Distributed Computing
NoC contention analysis using a branch-and-prune algorithm
ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Design Challenges for Many-Core Processors, Special Section on ESTIMedia'13 and Regular Papers
Graceful deadlock-free fault-tolerant routing algorithm for 3D Network-on-Chip architectures
Journal of Parallel and Distributed Computing
| Hi-index | 0.06 |
Network throughput can be increased by dividing the buffer storage associated with each network channel into several virtual channels. Each physical channel is associated with several small queues, virtual channels, rather than a single deep queue. The virtual channels associated with one physical channel are allocated independently but compete with each other for physical bandwidth. Virtual channels decouple buffer resources from transmission resources. This decoupling allows active messages to pass blocked messages using network bandwidth that would otherwise be left idle. The paper studies the performance of networks using virtual channels using both analysis and simulation. These studies show that virtual channels increase network throughput, by a factor of four for 10-stage networks, and reduce the dependence of throughput on the depth of the network.