Fault Tolerant Operating Systems
ACM Computing Surveys (CSUR)
Operating System Structures to Support Security and Reliable Software
ACM Computing Surveys (CSUR)
Reflections on an operating system design
Communications of the ACM
Communications of the ACM
Programming semantics for multiprogrammed computations
Communications of the ACM
Advances in Computer Architecture
Advances in Computer Architecture
ACM SIGOPS Operating Systems Review
A new protection architecture for the Cambridge capability computer
ACM SIGOPS Operating Systems Review
A hardware architecture for controlling information flow
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Storage concepts in a software-reliability-directed computer architecture
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
Protection in the Hydra Operating System
SOSP '75 Proceedings of the fifth ACM symposium on Operating systems principles
The Cambridge CAP computer and its protection system
SOSP '77 Proceedings of the sixth ACM symposium on Operating systems principles
An experimental implementation of the kernel/domain architecture
SOSP '73 Proceedings of the fourth ACM symposium on Operating system principles
On the semantic structure of information - A proposal of the abstract storage architecture
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Vertical and outboard migration: a progress report
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Covert channel analysis of the password-capability system
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
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The SWARD architecture, an experimental higher-level architecture, contains the naming and protection concept of capability-based addressing. After discussing the merits of capability-based addressing, its general representation in the SWARD architecture is discussed. The initial representation of capability-based addressing in the architecture led to a set of problems; these problems are described, as well as their solutions. Finally, the implementation of capabilities by the processor is discussed.