Design of digital systems for arbitrary sampling rate conversion

  • Authors:
  • Gennaro Evangelista

  • Affiliations:
  • Siemens, Mobile Phones, Haidenauplatz 1, D-81667 Munich, Germany

  • Venue:
  • Signal Processing
  • Year:
  • 2003

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Abstract

The conversion of digital signals from a given sampling rate to a second, arbitrary sampling rate, with both sampling rates derived from independent clock generators, is revisited. A general approach to arbitrary sampling rate conversion is presented from which two efficient realisations are deduced. The computational expenditure of both realisations is derived under the restriction of finite coefficient wordlengths. Finally, design examples demonstrate how to find the optimised parameters and finite wordlength coefficients of an arbitrary sampling rate converter with minimised expenditure and a prescribed performance.