IEEE Transactions on Parallel and Distributed Systems
Checkpointing Distributed Shared Memory
The Journal of Supercomputing - Special issue: high performance distributed computing
Design, implementation and evaluation of ICARE: an efficient recoverable DSM
Software—Practice & Experience - Special issue on multiprocessor operating systems
Distributed-Shared-Memory Support on the Simultaneous Optical Multiprocessor Exchange Bus
MASCOTS '98 Proceedings of the 6th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems
The simultaneous optical multiprocessor exchange bus
MPPOI '95 Proceedings of the Second Workshop on Massively Parallel Processing Using Optical Interconnections
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The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network that directly links arbitrary pairs of processor nodes without contention, and can efficiently interconnect over one hundred nodes. Each node has a dedicated output channel and an array of receivers, with one receiver dedicated to every other node's output channel. The SOME-Bus eliminates the need for global arbitration and provides bandwidth that scales directly with the number of nodes in the system. Under the Distributed Shared Memory (DSM) paradigm, the SOME-bus allows strong integration of the transmitter, receiver and cache controller hardware to produce a highly integrated system-wide cache coherence mechanism. Backward Error Recovery fault-tolerance techniques can rely on DSM data replication and SOME-Bus broadcasts with little additional network traffic and corresponding performance degradation. This paper presents three protocols for fault-tolerant DSM and uses simulation to examine the performance of the protocols on the SOME-Bus multiprocessor architecture.