2.5n-Step Sorting on n*n Meshes in the Presence of o(sqrt(n)) Worst-Case Faults

Authors:
Chi-Hsiang Yeh;Behrooz Parhami;Hua Lee;Emmanouel A. Varvarigos
Affiliations:
-;-;-;-
Venue:
IPPS '99/SPDP '99 Proceedings of the 13th International Symposium on Parallel Processing and the 10th Symposium on Parallel and Distributed Processing
Year:
1999

Citing 0
Cited 2

RACE: A Software-Based Fault Tolerance Scheme for Systematically Transforming Ordinary Algorithms to Robust Algorithms

IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Constant time fault tolerant algorithms for a linear array with a reconfigurable pipelined bus system

Journal of Parallel and Distributed Computing

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Abstract

In this paper, we propose the robust algorithm-configured emulation (RACE) scheme for the design of simple and efficient robust algorithms that can run on faulty mesh-connected computers. We show that 1-1 sorting (1 key per healthy processor) can be performed in 2:5n + o(n) communication steps and 2n + o(n) comparison steps on an n 脳 n mesh with an arbitrary pattern of o(vn) faults. This running time has exactly the same leading constant as the best known algorithms for 1-1 sorting on an n 脳 n fault-free mesh. We also formulate the mesh robustness theorem, which leads to a variety of efficient robust algorithms on faulty meshes.