On Trace Assertion Method of Module Interface Specification with Concurrency

Authors:
Ryszard Janicki;Yan Liu
Affiliations:
-;-
Venue:
RSCTC '00 Revised Papers from the Second International Conference on Rough Sets and Current Trends in Computing
Year:
2000

Citing 11
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Abstract

The trace assertion method is a formal state machine based method for specifying module interfaces [1, 9]. It can be seen as an alternative to algebraic specification technique. We extend the sequential model presented in [9] by allowing simple concurrency.