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Compiling for numa parallel machines
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Unifying data and control transformations for distributed shared-memory machines
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Parametric Analysis of Polyhedral Iteration Spaces
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Euro-Par '97 Proceedings of the Third International Euro-Par Conference on Parallel Processing
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The Data Parallel Programming Model: Foundations, HPF Realization, and Scientific Applications
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A significant source for enhancing application performance and for reducing power consumption in embedded processor applications is to improve the usage of the memory hierarchy. Such objective classically translates into optimizing spatial and temporal data locality especially for nested loops. In this paper, we focus on temporal data locality. Unlike many existing methods, our approach pays special attention to TLB (Translation Lookaside Buffer) effectiveness since a TLB miss can take up to three times more cycles than a cache miss. We propose a generalization of the traditional approach for temporal locality improvement, called data sequence localization, which reduces the number of iterations that separates accesses to a given array element.