Verification Using Tabled Logic Programming

  • Authors:
  • C. R. Ramakrishnan

  • Affiliations:
  • -

  • Venue:
  • CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
  • Year:
  • 2000

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Abstract

The LMC project aims to advance the state of the art of system specification and verification using the latest developments in logic programming technology [CDD+98]. Initially, the project was focussed on developing an efficient model checker, called XMC [RRR+97], for value-passing CCS [Mil89] and the modal mu-calculus [Koz83] based on the XSB logic programming system [XSB00]. We developed an optimizing compiler to translate specifications in a dialect of value-passing CCS to compact labeled transition systems [DR99], improving verification performance several fold. The core principles of this translation have been recently incorporated in SPIN [Hol97] showing similar gains in performance [Hol99]. The XMC system can be downloaded from http://www.cs.sunysb.edu/~lmc.