VLIW compilation techniques in a superscalar environment
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Value locality and load value prediction
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Exceeding the dataflow limit via value prediction
Proceedings of the 29th annual ACM/IEEE international symposium on Microarchitecture
Improving the accuracy and performance of memory communication through renaming
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Extending Value Reuse to Basic Blocks with Compiler Support
IEEE Transactions on Computers
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
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Prolog tailoring technique, an optimization method to improve the execution speed of a procedure, is proposed in this paper. When a procedure is repeatedly called and the machine has a lot of callee-saved registers, optimizing prolog and epilog of the procedure can become an important step of optimization. Epilog tailoring supported by IBM xlc compiler has been known to improve a procedure's execution speed by reducing the number of register-restoring instructions on exit points. In this paper, we propose a prolog tailoring technique that can reduce register-saving instructions at entry points. We can optimize prolog by providing multiple tailored versions of it on different execution paths of the procedure and by delaying the generation of register-saving instructions as late as possible on each path. However, generating prolog inside diamond structures or loop structures will cause incorrectness or unnecessary code repetition. We propose a technique to generate efficient prolog without such problems based on Tarjan's algorithms to detect SCCs (Strongly Connected Components) and BCCs (Bi-Connected Components).