A Performance Study on Bounteous Transfer in Multiprocessor Sectored Caches
The Journal of Supercomputing - Special issue: high performance computing systems
Latencies of conflicting writes on contemporary multicore architectures
PaCT'07 Proceedings of the 9th international conference on Parallel Computing Technologies
| Hi-index | 0.00 |
In this paper we study the effectiveness of sectored caches in reducing false sharing misses on bus-based multiprocessors. In a sectored cache, each cache line is divided into several subblocks. A subblock is a basic coherence unit. When false sharing occurs, the involved cache line needs not be invalidated or transferred, as long as the corresponding subblocks are kept coherent. To facilitate the study, we extend the conventional MESI protocol to sectored caches and define a performance metric called the degree of false sharing reduction to quantify the false sharing reduction on such caches. We simulated the execution of typical benchmarks, FFT, LU, Radix, SORBYR and SORBYC, on sectored caches. Evaluation results show that our scheme can effectively reduce about 30% to 80% false sharing misses and avoid useless coherence operations.