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LICS '13 Proceedings of the 2013 28th Annual ACM/IEEE Symposium on Logic in Computer Science
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The paper shows a simple LOGSPACE-reduction from the boolean circuit value problem which demonstrates that, on finite labelled transition systems, deciding an arbitrary relation which subsumes bisimulation equivalence and is subsumed by trace preorder is a polynomial-time-hard problem (and thus can not be expected to be efficiently parallelizable). By this, the result of Balc谩zar, Gabarr贸 and S谩ntha (1992) for bisimilarity is substantially extended.