Specifying real-time requirements for SDL specifications - a temporal logic-based approach
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In this paper we propose some extensions necessary to enable the specification and description language SDL to become a more appropriate formalism for the design of real-time and embedded systems. The extensions we envisage concern both roles of SDL: first, in order to make SDL a better real-time specification language, allowing to correctly simulate and verify real-time specifications, we propose a set of annotations to express in a flexible way assumptions and assertions on timing issues such as execution durations, communication delays, or periodicity of external inputs; second, in order to make SDL a better real-time design language, several useful real-time programming concepts are added. In particular we propose to extend the basic SDL timer mechanism by introducing new primitives such as cyclic timers, interruptive timers, and access to timer value. All these extensions rely on a clear and powerful time semantics for SDL, which extends the current one, and which is based on timed automata with urgencies.