The Aurora or-parallel Prolog system
New Generation Computing - Selected papers on parallel logic programming from the International Conference on Fifth Generation Computer Systems, 1988
Prolog and its performance: exploiting independent and-parallelism
Logic programming
Andorra I: a parallel Prolog system that transparently exploits both And-and or-parallelism
PPOPP '91 Proceedings of the third ACM SIGPLAN symposium on Principles and practice of parallel programming
Flexible scheduling of or-parallelism is Aurora: the Bristol scheduler
PARLE '91 Proceedings on Parallel architectures and languages Europe : volume II: parallel languages: volume II: parallel languages
The Muse Or-parallel Prolog model and its performance
Proceedings of the 1990 North American conference on Logic programming
Performance of the compiler-based Andorra-I system
ICLP'93 Proceedings of the tenth international conference on logic programming on Logic programming
Reform Prolog: the language and its implementation
ICLP'93 Proceedings of the tenth international conference on logic programming on Logic programming
A portable and reasonably efficient implementation of KL1
ICLP'93 Proceedings of the tenth international conference on logic programming on Logic programming
ACE: and/or-parallel copying-based execution of logic programs
Proceedings of the eleventh international conference on Logic programming
Evaluating parallel logic programming systems on scalable multiprocessors
PASCO '97 Proceedings of the second international symposium on Parallel symbolic computation
The directory-based cache coherence protocol for the DASH multiprocessor
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Memory Performance of Prolong Architectures
Memory Performance of Prolong Architectures
MINT: A Front End for Efficient Simulation of Shared-Memory Multiprocessors
MASCOTS '94 Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
Optimising Parallel Logic Programming Systems for Scalable Machines
Euro-Par '98 Proceedings of the 4th International Euro-Par Conference on Parallel Processing
Using cache memory to reduce processor-memory traffic
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
SS '95 Proceedings of the 28th Annual Simulation Symposium
Implementation of committed choice logic languages on shared memory multiprocessors
Implementation of committed choice logic languages on shared memory multiprocessors
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In this paper we use execution-driven simulation of a scalable multiprocessor to evaluate the performance of the Andorra-I parallel logic programming system under invalidate and update-based protocols. We use two versions of Andorra-I. One of them was originally designed for bus-based multiprocessors, while the other is optimised for scalable architectures. We study a well-known invalidate protocol and two different update-based protocols. Our results show that for our sample logic programs the update-based protocols outperform their invalidate-based counterpart for the original version of Andorra-I. In contrast, the optimised version of Andorra-I benefits the most from the invalidate-based protocol, but a hybrid update-based protocol performs as well as the invalidate protocol in most cases. We conclude that parallel logic programming systems can consistently benefit from hybrid update-based protocols.