Design and validation of computer protocols
Design and validation of computer protocols
Transactional memory: architectural support for lock-free data structures
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Principles of transaction processing: for the systems professional
Principles of transaction processing: for the systems professional
Recoverable Persistent Memory for SmartCard
CARDIS '98 Proceedings of the The International Conference on Smart Card Research and Applications
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume I - Volume I
Towards a Full Formal Specification of the JavaCard API
E-SMART '01 Proceedings of the International Conference on Research in Smart Cards: Smart Card Programming and Security
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A transacted memory that is implemented using EEPROM technology offers persistence, undoability and auditing. The transacted memory system is formally specified in Z, and refined in two steps to a prototype C implementation / SPIN model. Conclusions are offered both on the transacted memory system itself and on the development process involving multiple notations and tools.