Supervisory control of a class of discrete event processes
SIAM Journal on Control and Optimization
On the synthesis of a reactive module
POPL '89 Proceedings of the 16th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Techniques for automatic verification of real-time systems
Techniques for automatic verification of real-time systems
Model-checking in dense real-time
Information and Computation - Special issue: selections from 1990 IEEE symposium on logic in computer science
Symbolic model checking for real-time systems
Information and Computation
Proceedings of the DIMACS/SYCON workshop on Hybrid systems III : verification and control: verification and control
Timing Assumptions and Verification of Finite-State Concurrent Systems
Proceedings of the International Workshop on Automatic Verification Methods for Finite State Systems
Symbolic Controller Synthesis for Discrete and Timed Systems
Hybrid Systems II
Kronos: A Model-Checking Tool for Real-Time Systems
CAV '98 Proceedings of the 10th International Conference on Computer Aided Verification
Analysis of Timed Systems Based on Time-Abstracting Bisimulation
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Exploiting Implicit Representations in Timed Automaton Verification for Controller Synthesis
HSCC '02 Proceedings of the 5th International Workshop on Hybrid Systems: Computation and Control
Efficient on-the-fly algorithms for the analysis of timed games
CONCUR 2005 - Concurrency Theory
A model-based approach for multiple QoS in scheduling: from models to implementation
Automated Software Engineering
Quantitative analysis of real-time systems using priced timed automata
Communications of the ACM
Verification, performance analysis and controller synthesis for real-time systems
FSEN'09 Proceedings of the Third IPM international conference on Fundamentals of Software Engineering
Embedded Systems Design
| Hi-index | 0.02 |
We present novel techniques for efficient controller synthesis for untimed and timed systems with respect to invariance and reachability properties. In the untimed case, we give algorithms for controller synthesis in the context of finite graphs with controllable and uncontrollable edges, distinguishing between the actions of the system and its environment, respectively. The algorithms are on-the-fly, since they return a controller as soon as one is found, which avoids the generation of the whole state space. In the timed case, we use the model of timed automata extended with controllable and uncontrollable discrete transitions. Our controller-synthesis method here is only half on-the-fly, since it relies on the a-priori generation of a finite model (graph) of the timed automaton, as quotient of the time-abstracting bisimulation. The quotient graph is essentially an untimed graph, upon which we can apply the untimed on-the-fly algorithms to compute a timed controller.