An abstract machine for restricted AND-parallel execution of logic programs
Proceedings on Third international conference on logic programming
Compiling Prolog into microcode: a case study using the NCR/32-000
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
HPS, a new microarchitecture: rationale and introduction
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
Studies in Prolog architectures
Studies in Prolog architectures
A distributed prolog system with AND-parallelism
Proceedings of the Twenty-First Annual Hawaii International Conference on Software Track
The Berkeley PLM Instruction Set: An Instruction Set for Prolog
The Berkeley PLM Instruction Set: An Instruction Set for Prolog
The and/or process model for parallel interpretation of logic programs
The and/or process model for parallel interpretation of logic programs
A high performance architecture for prolog
A high performance architecture for prolog
A parallel execution model for prolog
A parallel execution model for prolog
Parallel unification scheduling in prolog
Parallel unification scheduling in prolog
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This paper describes the microarchitecture of the PLUM, a high performance Prolog machine. Multiple specialized functional units, each with a port to memory, operate in parallel using data driven control. Instructions are dynamically scheduled by a Prefetch Unit to execute on several specialized functional units. Out of order execution is allowed, and instructions execute when their operands are available. Special synchronization techniques that ensure correct parallel unification and pipelined operation are discussed. The performance of the PLUM is limited by unification, since almost all other operations execute in parallel with unification. Unification time is reduced by parallel unification, resulting in an overall speedup of approximately a factor of 4 over the Berkeley PLM.