Performance driven reliable link design for networks on chips
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
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To match the reliability requirements of small embedded systems, a design methodology is proposed that provides some fault tolerant capabilities to self-checking sequential circuits. By means of simple modifications, such circuits are made fault tolerant with respect to transient, crosstalk and delay faults, while they maintain their self-checking capabilities with respect to permanent faults. The method requires a small area overhead and may also provide some benefit from the yield point of view.