A Prototype of a VHDL-Based Fault Injection Tool

Authors:
J. C. Baraza;J. Gracia;D. Gil;P. J. Gil
Affiliations:
-;-;-;-
Venue:
DFT '00 Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
Year:
2000

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Abstract

This paper presents the prototype of an automatic and model-independent fault injection tool, to use on an IBM-PC (or compatible) platform. The tool has been built around a commercial VHDL simulator. With this tool, both transient and permanent faults, of a wide range of types, can be injected into medium-complexity models. Another remarkable aspect of the tool is the fact that it is able to analyse the results obtained from the injection campaigns, in order to study the Error Syndrome of the system model and/or validate its Fault-Tolerance Mechanisms. Some results of a fault injection campaign carried out to validate the Dependability of a fault tolerant microcomputer system are shown. We have analyzed the pathology of the propagated errors, measured their latencies, and calculated both error detection and recovery latencies and coverages.