Siamese-Twin: A Dynamically Fault-Tolerant Fat-Tree
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
An efficient fault-tolerant routing methodology for fat-tree interconnection networks
ISPA'07 Proceedings of the 5th international conference on Parallel and Distributed Processing and Applications
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In this paper, we propose a fault tolerant baseline network as a sort of MINs (multistage interconnection networks) and discuss its performance analysis. For our MIN with N input and N output terminals, switching elements in the first and n-th stages are duplicated where n =log2N. Four-input two-output switching elements and two-input four output ones employed in the second and (n - 1)-th stages are useful in sharing loads efficiently on the first and n-th stages respectively. The comparison results show that the theoretical throughput of our MIN without faults and the performance of our MIN with faults are superior to those of previously known ELMIN though our MIN requires slightly more hardware overhead than ELMIN.