The Role of the Embedded Memories in the Implementation of Artificial Neural Networks

  • Authors:
  • Rafael Gadea Gironés;Vicente Herrero;Angel Sebastia;Antonio Mocholí Salcedo

  • Affiliations:
  • -;-;-;-

  • Venue:
  • FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
  • Year:
  • 2000

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Abstract

The paper describes the implementation of a systolic array for a multilayer perceptron on different FPGA architectures with a hardware-friendly learning algorithm: Pipelined On-line Backpropagation. By exploiting the embedded memories of certain families alongside the projection used in the systolic architecture, we can implement very large interconnection layers. These physical and architectural features - together with the combination of FPGA reconfiguration properties with a design flow based on generic VHDL - permit us to create an easy, flexible and fast method of designing a complete ANN on a single FPGA. The result offers a high degree of parallelism and fast performance.