Hardware Software Partitioning Using Genetic Algorithm
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Design and Implementation of an XC6216 FPGA Model in Verilog
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
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There are various ways to use genetic algorithms in system design. In this paper we present two approaches: genetic algorithms for partitioning the system into hardware and software and using genetic algorithms for implementing hardware on an FPGA. By using genetic algorithms for the partitioning of the system it is possible to integrate fault tolerance automatically into the system. Developing hardware with genetic algorithms provides the possibility to create various alternatives, usable in the partitioning phase. Also fault ignoring implementations can be developed.