Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver

  • Authors:
  • Lok-Kee Ting;Roger Woods;Colin Cowan

  • Affiliations:
  • -;-;-

  • Venue:
  • FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
  • Year:
  • 2001

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Abstract

This paper presents an FPGA solution for a high-speed front-end digital receiver of an Electronic Support Measures (ESM) system. An LMS-based adaptive predictor has been chosen to improve the signal-to-noise ratio (SNR) of the received radar signals. Two fine-grained pipelined architectures based on the Delay LMS (DLMS) algorithm have been developed for FPGA implementation. This paper also highlights the importance of choosing a suitable filter architecture in order to utilise FPGA resources resulting in a more efficient implementation. FPGA implementation results, including timing and area, are given and discussed.