Implementation of a NURBS to Bézier Conversor with Constant Latency

Authors:
Paula N. Mallón;Montserrat Bóo;Javier D. Bruguera
Affiliations:
-;-;-
Venue:
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Year:
2001

Citing 4
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Abstract

In this paper, a FPGA implementation is presented to carry out the conversion process from NURBS to BÉzier curves. It has a simple and regular timing schedule with a constant latency which reduces the area requirements with respect to previous implementations. The operation frequency obtained with the Xilinx tools, is around 13 MHz. The scheme we propose can be easily extended to process NURBS and BÉzier surfaces.