A Novel Watermarking Technique for LUT Based FPGA Designs

Authors:
Dylan Carline;Paul Coulton
Affiliations:
-;-
Venue:
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Year:
2002

Citing 3
Cited 1

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Internet Authentication of LUT-Based FPGA Configuration Files

IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium

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Abstract

Although methods for watermarking Field Programmable Gate Arrays (FPGA) have been proposed, they require a high-level design approach whereby additional circuitry, or information embedded in unused logic elements indicate design ownership. The method proposed in this paper is unique in that: it is applied directly to the bit-stream used to configure Look Up Table (LUT) -based FPGAs; has no effect on the operation of the device; can be applied retrospectively to existing designs; attacks require both detailed knowledge of device architecture and direct manipulation of the design at a bitstream level.