RF CMOS circuit optimizing procedure and synthesis tool

Authors:
Chandrasekar Rajagopal;Karthik Sridhar;Adrian Nunez
Affiliations:
Syracuse University, Syracuse, NY;Syracuse University, Syracuse, NY;Syracuse University, Syracuse, NY
Venue:
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Year:
2003

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Abstract

In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications described at high-level of abstraction, fabrication dependent technology parameters and un-sized circuit topologies. The output is a sized net list, which meets the user constraints.The synthesis environment considers user-defined performance parameters into account, and it relies on a genetic algorithm based heuristic method to search for a solution in a large design-space. The synthesis tool determines a solution set of design parameters such that the circuit satisfies the overall design constraints.