Application of the simulated annealing local search technique to problems of redundancy elimination in functional and parametric tests of integrated circuits

Authors:
W. Mergenthaler;B. Mauersberg;J. Feller;L. J. Stuehler;W. T. O'Grady, Jr.;J. S. Ledford
Affiliations:
Frankfurt Consulting Engineers, Beratende Ingenieure Frankfurt, Altmunsterstrasse 2D, Flörsheim D-65439, Germany;Frankfurt Consulting Engineers, Beratende Ingenieure Frankfurt, Altmunsterstrasse 2D, Flörsheim D-65439, Germany;Frankfurt Consulting Engineers, Beratende Ingenieure Frankfurt, Altmunsterstrasse 2D, Flörsheim D-65439, Germany;Infineon Technologies AG, St. Martin-Str. 76, D-81541 München, Germany;Agilent Technologies, 12401 Research Blvd., Suite 100, Austin, TX;Agilent Technologies, 12401 Research Blvd., Suite 100, Austin, TX
Venue:
Mathematics and Computers in Simulation - Special issue: 3rd IMACS seminar on Monte Carlo methods - MCM 2001
Year:
2003

Citing 3
Cited 0

Simulated annealing: A pedestrian review of the theory and some applications

Proc. of the NATO Advanced Study Institute on Pattern recognition theory and applications
Numerical recipes in C: the art of scientific computing

Numerical recipes in C: the art of scientific computing
How to solve it: modern heuristics

How to solve it: modern heuristics

Quantified Score

Hi-index	0.00

Visualization

Abstract

Testing integrated circuits is a costly process. The present article investigates combinatorial optimization problems reducing subsets of tests, which are redundant in a statistical sense. The solution to those problems is brought about by application of the Simulated annealing local search technique, which, in turn makes wide use of random number generation.