A Memory-based Architecture for MPEG2 System Protocol LSIs

Authors:
Minoru Inamori;Jiro Naganuma;Haruo Wakabayashi;Makoto Endo
Affiliations:
NTT LSI Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa Pref., 243-01, Japan;NTT LSI Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa Pref., 243-01, Japan;NTT LSI Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa Pref., 243-01, Japan;NTT LSI Laboratories, 3-1 Morinosato Wakamiya, Atsugi, Kanagawa Pref., 243-01, Japan
Venue:
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Year:
1996

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Abstract

This paper proposes a memory-based architecture implementing the MPEG2 System protocol LSIs, and demonstrates its flexibility and performance. The memory-based architecture implements the full functionality of the MPEG2 System protocol for both multiplexing and de-multiplexing MPEG2-encoded streams. It consists of a core CPU, memories, and dedicated application-specific hardware. It is designed and optimized by hardware/software co-design techniques. The LSIs provide sufficient performance and flexibility for real-time applications of the MPEG2 System protocol.