FPGA-Based Implementation of Variable Sized Structuring Elements for 2D Binary Morphological Operations

Authors:
Joerg Velten;Anton Kummert
Affiliations:
-;-
Venue:
DELTA '02 Proceedings of the The First IEEE International Workshop on Electronic Design, Test and Applications (DELTA '02)
Year:
2002

Citing 0
Cited 2

Binary morphology with spatially variant structuring elements: algorithm and architecture

IEEE Transactions on Image Processing
FPGA-based architecture for real time segmentation and denoising of HD video

Journal of Real-Time Image Processing

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Abstract

Binary morphological operations are an important means for real time image processing applications. While fixed size structuring elements are sufficient for usual image processing steps, more sophisticated Algorithms require structuring elements of variable shape. These operations can be realized by using boolean logic in connetion with dead time elements, which leads to a straightforward implementation if using FPGAs.