Polynomial Vicinity Circuits and Nonlinear Lower Bounds

  • Authors:
  • Kenneth W. Regan

  • Affiliations:
  • -

  • Venue:
  • CCC '97 Proceedings of the 12th Annual IEEE Conference on Computational Complexity
  • Year:
  • 1997

Quantified Score

Hi-index 0.00

Visualization

Abstract

We study families of Boolean circuits with the property that the number of gates at distance t fanning into or out of any given gate in a circuit is bounded above by a polynomial in t of some degree k. We prove that such circuits require size \Omega(n^{1+1/k}/\log n) to compute several natural families of functions, including sorting, finite field arithmetic, and the ``rigid linear transformations'' of [Valiant, 1977]. Our proof develops a ``separator theorem'' in the style of [Lipton and Tarjan, 1979] for a new class of graphs, and our methods may have independent graph-theoretic interest.