Architecture of a Broadband Mediaprocessor
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
MicroUnity's MediaProcessor Architecture
IEEE Micro
Architecture of a Broadband Mediaprocessor
COMPCON '96 Proceedings of the 41st IEEE International Computer Conference
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An emerging class of applications for DRAMs demands new levels of bandwidth per package. As the 64 Mb generation becomes predominant, many high-volume media and communications products will have a memory capacity requirement which can be met by a single DRAM component, yet the sustained bandwidth required from that memory will be on the order of a Gigabyte per second. Furthermore, at high levels of system integration, sensitive mixed signal elements will demand a low noise interconnect to external memory components. This paper presents an approach which can deliver the required performance via a very low noise interconnect at negligible incremental cost and power over conventional DRAMs.