Hardware Accelerator for Subgraph Isomorphism Problems

Authors:
Shuichi Ichikawa;Lerdtanaseangtham Udorn;Kouji Konishi
Affiliations:
-;-;-
Venue:
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Year:
2000

Citing 1
Cited 2

An Algorithm for Subgraph Isomorphism

Journal of the ACM (JACM)

Reconfigurable Systems: New Activities in Asia

FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Evaluation of Accelerator Designs for Subgraph Isomorphism Problem

FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications

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Abstract

Many applications can be modeled as subgraph isomorphism problem, which is generally NP-complete. This paper presents an algorithm that is suited for hardware implementation. The prototype accelerator that operates at 16.5 MHz on Lucent ORCA 2C15A FPGA outperforms the software implementation of Ullmann's algorithm on 400 MHz Pentium II by 10 times in the best case.