Extremal bipartite graphs and superpolynomial lower bounds for monotone span programs
STOC '96 Proceedings of the twenty-eighth annual ACM symposium on Theory of computing
A characterization of span program size and improved lower bounds for monotone span programs
STOC '98 Proceedings of the thirtieth annual ACM symposium on Theory of computing
Higher lower bounds on monotone size
STOC '00 Proceedings of the thirty-second annual ACM symposium on Theory of computing
A Note on the Bottleneck Counting Argument
CCC '97 Proceedings of the 12th Annual IEEE Conference on Computational Complexity
Finite Limits and Monotone Computations: The Lower Bounds Criterion
CCC '97 Proceedings of the 12th Annual IEEE Conference on Computational Complexity
A characterization of span program size and improved lower bounds for monotone span programs
Computational Complexity
Generalizing Boolean satisfiability I: background and survey of existing work
Journal of Artificial Intelligence Research
On the monotone circuit complexity of quadratic boolean functions
ISAAC'04 Proceedings of the 15th international conference on Algorithms and Computation
Tight bounds for monotone switching networks via fourier analysis
STOC '12 Proceedings of the forty-fourth annual ACM symposium on Theory of computing
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The method of proving lower bounds by bottleneck counting is illustrated for monotone Boolean circuits. This paper gives another proof of the result of Razborov (1985) and Andreev (1985), that monotone Boolean circuits must have exponential size when solving a problem in NP. More specifically, the paper defines a graph recognition problem called BMS. Any monotone circuit that solves BMS, must contain a quantity of gates that is exponential in the eighth root of the input size. The actual instances of the BMS problem used to prove the lower bound are easy to separate for non-monotone circuits. The proof is self-contained and uses only elementary combinatorics.