Implementation and evaluation of a list-processing-oriented data flow machine
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
An architecture of a dataflow single chip processor
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
The EPSILON-2 multiprocessor system
Journal of Parallel and Distributed Computing - Special issue: data-flow processing
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
T: a multithreaded massively parallel architecture
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Active messages: a mechanism for integrated communication and computation
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
A design study of the EARTH multiprocessor
PACT '95 Proceedings of the IFIP WG10.3 working conference on Parallel architectures and compilation techniques
Monsoon: an explicit token-store architecture
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Datarol-II: A Fine-Grain Massively Parallel Architecture
PARLE '94 Proceedings of the 6th International PARLE Conference on Parallel Architectures and Languages Europe
Building Multithreaded Architectures with Off-the-Shelf Microprocessors
Proceedings of the 8th International Symposium on Parallel Processing
KUMP/D: the Kyushu University multi-media processor
CAMP '95 Proceedings of the Computer Architectures for Machine Perception
Fine-grain multi-thread processor architecture for massively parallel processing
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
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High speed message handling is one of the most important problems for efficient multithread processing. We have proposed a processor architecture called Datarol-II, that promotes the efficient fine-grain multithreaded execution, by performing fast context switching among fine-grain concurrent processes. We are developing a prototype multithread machine KUMP/D (Kyushu University Multi-media Processor on Datarol-II). The processing element of KUMP/D is designed on the basis of a fine-grain message driven (FMD) execution model, in which fine-grain multithreaded executions are driven and controlled by simple fine-grain message communications. In the design of the KUMP/D, we used the off-the-shelf microprocessor Pentium for its processing element and designed a co-processor, called FMP (Fine grain Message Processor), for fine grained message handling and communication control. In this paper, we propose the FMD model and introduce the processing element construction. In the KUMP/D machine which is a practical implementation of the FMD using the Pentium and the FMP, then discuss the feasibility of the design from the viewpoint of cost/performance.