Recursive Diagonal Torus: An Interconnection Network for Massively Parallel Computers
IEEE Transactions on Parallel and Distributed Systems
Dynamic security domain scaling on embedded symmetric multiprocessors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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A massively parallel processor called JUMP-1 has been developed to build an efficient cache coherent-distributed shared memory(DSM) on a large system with more than 1000 processors. Here, the dedicated processor called MBP(Memory Based Processor)-light to manage the DSM of JUMP-1 is introduced, and its preliminary performance with two protocol policies --update/invalidate-- is evaluated.From results of its simulation, it appears that simple operations like the tag check and the collection/generation of acknowledgment packets are mostly processed by the hardware mechanisms in MBP-light without aids of the core processor with both policies.Also, the buffer-register architecture adopted by the core processor in MBP-light is exploited enough to process a protocol transaction for both policies.