GlitchMap: an FPGA technology mapper for low power considering glitches
Proceedings of the 44th annual Design Automation Conference
SETmap: a soft error tolerant mapping algorithm for FPGA designs with low power
Proceedings of the 16th Asia and South Pacific Design Automation Conference
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The problem of computing signal probabilities of digital circuits arises in the context of random testing, pseudorandom testing, and testability analysis. However, it has been known that computing signal probabilities is #P-complete. This implies that the problem might be intractable even if P = NP. Thus, any practical method will estimate such probabilities instead of computing the exact values. This paper presents a simple but effective algorithm for estimating signal probabilities. It provides significantly better estimates of signal probabilities than the weighted averaging algorithm and most importantly is linear in the product of circuit size and the number of primary inputs. Based on this algorithm, the detection probabilities of stuck-at faults are estimated. Experimental results using ISCAS benchmark circuits show the effectiveness and the improvement of this technique over the simple algorithm as well as the weight averaging algorithm. The correlation coefficients of the results are extremely good and the algorithm is very fast.