Concurrent Error Detection Using Watchdog Processors-A Survey
IEEE Transactions on Computers
Error detection with latency in sequential circuits
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
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Four schemes for the design of concurrently testable microprogrammed control units are presented. In Schemes 1 and 2 the concept of path signatures is used for detection of malfunctions in the control unit. Two different methods for computation of signatures are given. In Schemes 3 and 4, a check-symbol is assigned to each microinstruction and the integrity of these check-symbols is checked concurrently. A deterministic approach is used for generation of check-symbols in Scheme 4. A comparative study of these schemes is done with respect to storage and time overhead, error coverage, and implementation complexity.