WATFOR—The University of Waterloo FORTRAN IV compiler
Communications of the ACM
Operating Systems, Proceedings of an International Symposium
Operating Systems, Proceedings of an International Symposium
A program structure for error detection and recovery
Operating Systems, Proceedings of an International Symposium
Error detection with memory tags
Error detection with memory tags
Tagged architecture: how compelling are its advantages?
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Implicit-storing and redundant-encoding-of-attribute information in error-correction-codes
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture
Hi-index | 0.00 |
Many computer systems include extra bits in each word of storage to allow detection (and possibly correction) of memory failures. These same bits can be used to implement tag-checking without sacrificing their normal error-handling properties. The tagging facility so provided can be used to detect a variety of hardware and software errors that might otherwise go undetected. Because no extra storage is required, the cost of adding such tagging can be small even though the benefit derived can be large.