A data flow architecture with a paged memory system
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
DFSP: A Data Flow Signal Processor
IEEE Transactions on Computers
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The architecture of the Data Flow Signal Processor (DFSP) is discussed with the emphasis on its control mechanism. It is argued that the data flow principle can be efficiently applied to block processing operations of nonrecursive DSP computations, when shared data structures are avoided. Simulation results involving the optimal operand size and the memory use of the control section are presented. Due to the expandability and convenient programmability of the DFSP architecture, the range of its potential applications extends beyond signal processing as demonstrated by a DFSP based database machine.