Protection in programming languages
Communications of the ACM
Time Sharing Computer Systems
A new hardware capability architecture
ACM SIGOPS Operating Systems Review
The Cambridge CAP computer and its operating system (Operating and programming systems series)
The Cambridge CAP computer and its operating system (Operating and programming systems series)
Run-time checking in Lisp by integrating memory addressing and range checking
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
IEEE Expert: Intelligent Systems and Their Applications
An object-aware memory architecture
Science of Computer Programming - Special issue on five perspectives on modern memory management: Systems, hardware and theory
An object-aware memory architecture
An object-aware memory architecture
| Hi-index | 0.00 |
This paper is intended to stimulate discussion on the present state of hardware supported capability systems. Interest in such systems grew up in the mid-1960's and since that time information has been published on several different versions. In the opinion of some observers, the software complexity of these systems outweighs the advantage gained. The paper surveys the situation, and endeavors to set out the general features that a hardware supported capability system should possess. An attempt is made to identify the causes of the complexity and to make recommendations for removing them. The arguments for and against the tagging of capabilities are discussed and attention is drawn to a system of semi-tagging previously proposed by the author.