An IPC protocol and its hardware realization for a high-speed distributed multicomputer system

  • Authors:
  • W. K. Giloi;P. Behr

  • Affiliations:
  • -;-

  • Venue:
  • ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
  • Year:
  • 1981

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Abstract

Multicomputer systems with distributed control form an architecture that simultaneously satisfies such design goals as high performance through parallel operation of VLSI processors, modular extensibility, fault tolerance, and system software simplication. The nodes of the system may be locally concentrated or spatially dispersed as a local network. Applications range from data base-oriented transactional systems to “number crunching.” The system is service-oriented; that is, it appears to the user as one computer on which parallel processing takes place in the form of cooperating processes. Cooperation is regulated by the unique interprocess communication (IPC) protocol presented in this paper. The high-level protocol is based on the computer/producer model and satisfies all requirements for such a distributed multicomputer system. It is demonstrated that the protocol lends itself toward a straightforward mechanization by dedicated hardware consisting of a cooperation handler, an address transformation and memory guard unit, and bus connection logic. These special hardware resources, assisted by a “local operating system”, form the supervisor of a node. Nodes are connected by a high-speed bus (280M bit/sec). Programming aspects as implied by the IPC protocol are also described.