Monitors: an operating system structuring concept
Communications of the ACM
A hardware architecture for implementing protection rings
Communications of the ACM
The nucleus of a multiprogramming system
Communications of the ACM
The structure of the “THE”-multiprogramming system
Communications of the ACM
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In the architecture of the “Level 64” manufactured by CII-Honeywell-Bull and Honeywell Information Systems, processes executing in a central processor are known to the hardware-firmware. They use the same semaphore mechanism as processes executing in an input-output controller. This implies specific data structures recognized by the hardware-firmware and a hardware-firmware dispatching of the central processor resource. Experience in this domain has led to the development of some new extensions. The models “Level 64”, “64/DPS” and “DPS/7” are general purpose medium-scale computers. This paper describes some aspects of their common architecture which have so far not been presented at this level of detail. A characteristic of this architecture is the hardware-firmware implementation of many concepts which are most usually found in a software form. The term “integrated object” denotes - in this paper - a data structure built in main memory under software responsibility and made known to the hardware-firmware as an operand of a specific instruction which is able to replace an entire sequence of basic instructions. For example an instruction acting upon an integrated object “semaphore” involves complex operations on integrated objects “processes” (process switching, queueing, etc...). Emphasis is placed in this paper on semaphores and process operations performed through the use of semaphores. The term “hardware” will be exclusively used when referring to the combination of hardware-firmware.