Achieving speedups for APL on an SSIMD parallel computer
ACM SIGAPL APL Quote Quad
Parallel expression in the APL2 language
IBM Systems Journal
Compiling APL for parallel execution on an FFP machine
APL '85 Proceedings of the international conference on APL: APL and the future
| Hi-index | 0.00 |
Several computers have been built experimentally which incorporate a large number of identical CPUs. One example known to this author contains 65 identical microprocessors: one is the “master” and issues orders (normally identical or nearly so) to the other 64, called “slaves”. The master and each slave has its own storage unit. It is proposed that such a computer could be used as an auxiliary to a conventional computer to assist in the execution of APL code. APL vectors would be stored in scattered fashion, one element per slave memory, so that they can be processed in parallel. Reduce and scan operations are considered in detail, and requirements are derived for the data interconnection paths among the processors.