Contrasting translation, verification and synthesis in software and firmware engineering

  • Authors:
  • Robert A. Mueller;Gearold R. Johnson

  • Affiliations:
  • -;-

  • Venue:
  • MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
  • Year:
  • 1981

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Abstract

Translation, verification and synthesis are commonly used terms in the software field, yet these terms seem to be misunderstood by many which may inhibit progress. This paper attempts, through the use of definitions and examples, to clarify these concepts and their significance in both software and firmware engineering.