Advances in Computer Architecture
Advances in Computer Architecture
High-Level Language Computer Architecture
High-Level Language Computer Architecture
A processor for a high-performance personal computer
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
An insight into PDP-11 emulation
MICRO 9 Proceedings of the 9th annual workshop on Microprogramming
Ten years and more of micro-programming
ACM SIGMICRO Newsletter
ACM SIGMICRO Newsletter
A user-microprogrammable, local host computer with low-level parallelism
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
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A new microprogrammable computer with low-level parallelism was built and has been utilized as a research vehicle for solving different classes of research-oriented applications such as real-time processings on static/dynamic images, pictures and signals, and emulations of both existing and virtual machines including high (intermediate) level language machines. The design goal of a research-oriented computer, QA-1, was to achieve a high degree of processing power and system flexibility by means of a low-level parallel processing organization combined with dynamically microprogrammable control. This paper describes the QA-1's architecture-tailorability to different classes of emulations for existing machines such as the PDP-11/40 and the HITAC-10, and for high-level language machines such as, BASIC and PASCAL machines. All the results obtained from these experiments, together with the ones from well-defined applications such as a real-time color animation presented in another paper, have clarified some drawbacks of the QA-1 in its architectural uniformity, high functionality and microprogram productivity. On the basis of these final evaluations of the QA-1, this paper proposes a new architecture for a next generation computer, QA-2.